The invention relates to semiconductor devices, for example rectifier diodes, field-effect transistors, bipolar transistors and thyristors, having a p-n junction which is operated under reverse bias in at least one mode of operation of the device.
The article entitled "High Voltage Planar P-N Junctions" by Y. C. Kao and E. D. Wolley in the "Proceedings of the I.E.E.E.", Vol. 55, No. 8, August 1967, pages 1409 to 1414 describes semiconductor devices having a concentric field-limiting planar junction structure to increase the breakdown voltage. These devices comprise a semiconductor body having a portion of one conductivity type adjoining a major surface of the body. An active device region of the opposite conductivity type also adjoins said major surface and forms with said portion a main p-n junction which terminates at said major surface and which is operated under reverse bias in at least one mode of operation of the device. At least three annular regions of said opposite conductivity type extend around said active device region. These annular regions also adjoin said major surface and form with said portion auxiliary p-n junctions located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction. The spacing between two outer annular regions which are remote from the active device region is larger than the spacing between the active device region and an inner annular region which is adjacent the active device region. Said active device region and said annular regions are more highly doped than said portion of the body.
It is stated in the Proc. I.E.E.E. article that in the absence of the annular regions, a significantly higher electric field occurs at the surface-terminating portion of the (main) p-n junction than at the bulk portion which extends parallel to the surface, so resulting in avalanche breakdown of the p-n junction at the surface. The provision of the annular regions reduces the field at the surface so that breakdown does not occur until a higher voltage level which is comparable with the plane breakdown voltage of the bulk portion of the junction. The annular regions are spaced such that, at a voltage considerably less than the breakdown voltage of the bulk portion of the main junction, the space charge region of the main junction punches through to the first annular region. After the punch-through, further increases in voltage are largely taken up by the first annular region as the carriers are depleted on the outside of the annular region junction. The maximum electric field occurring across the main junction adjacent the surface is determined by the punch-through voltage and so can be controlled to be considerably less than the critical field, by adjusting the spacings. Thus the annular regions act like voltage dividers with the voltage between the main junction and the annular regions being a function of the spacing.
As illustrated in FIG. 3 of said Proc. I.E.E.E. article, in the devices fabricated and studied by Kao and Wolley the spacing between adjacent annular regions is larger remote from the active device region than adjacent the active device region. As stated in said article, this variable spacing was selected in order to study variation of punch-through voltage on a single structure. However it has subsequently been found that by varying the spacing in this manner a higher breakdown voltage can be achieved compared with a concentric annular structure of uniform spacing. All the annular regions of each individual device are of uniform width; Kao and Wooley state in the related U.K. Patent Specification (GB) No. 1,138,237A that their width is not important and can be made as narrow as feasible in order to retain as much area on the semiconductor body as possible for the main p-n junction. All the annular regions of each individual device described in GB No. 1,138,237A are also of uniform width.